Resource Efficient LDPC Decoders: From Algorithms to Hardware Architectures

This book takes a practical hands-on approach to developing low complexity algorithms and transforming them into working hardware. It follows a complete design approach – from algorithms to hardware architectures - and addresses some of the challenges associated with their design, providing insight into implementing innovative architectures based on low complexity algorithms.

The reader will learn:

Modern techniques to design, model and analyze low complexity LDPC algorithms as well as their hardware implementation

How to reduce computational complexity and power consumption using computer aided design techniques

All aspects of the design spectrum from algorithms to hardware implementation and performance trade-offs